This invention relates to a noise reduction system which is provided with a signal compressor and a signal expander.
It has heretofore been known that, in order to improve the signal-to-noise ratio of a certain specified communication system or specified recording and playing system, a noise reduction system provided with a signal compressor and a signal expander is employed.
In particular, a noise reduction system in which circuit constituent parts of the signal compressor and the signal expander are shared and in which the function of the signal compressor and that of the signal expander can be switched through the use of a mode switch has been proposed in "The Journal of the Society of Electronic and Radio Technicians (The SERT Journal), " Vol. 8, May/June, 1974, FIG. 1 shows a circuit block diagram of this switchable circuit compressor/signal expander. The switchable signal compressor/signal expander of this type is well known to those skilled in the art as a "Dolby B-type Noise Reduction System" (the word "Dolby" is a registered trademark of Dolby Laboratories).
When switched to the signal compressor, the Dolby B-type noise reduction system serves as an encoder. The signal compressor (encoder) compresses the dynamic range of input signals before the input signals are recorded on a recording tape. When switched to the signal expander side, this system serves as a decoder. The signal expander (decoder) restores the linearity of the dynamic range for the input signals. Noise which tends to be introduced in the recording/playing process is considerably reduced in this way, so that the combination of the signal compressor and the signal expander functions as a noise reduction system. in the Dolby B-type noise reduction system, the operations of signal compression/signal expansion are performed usually for signal components which are higher than a frequency value of 200 Hz.
Referring now to the circuit block diagram of FIG. 1, the well-known encoder/decoder will be described in detail. The noise reduction system shown in FIG. 1 has a main path l.sub.m which extends between an input terminal T.sub.1 and an output terminal T.sub.2, and a side path l.sub.s which extends between a mode switch SW for the encoder/decoder switching and the output terminal T.sub.2. On the main path l.sub.m, a combining network 10 and an inverter 11 are provided in series. On the side path l.sub.s, there are arranged a variable filter 12, a signal amplifier 13, a control amplifier 14, a rectifier and integrator 15, and an overshoot suppressor 16.
In the case where the mode switch SW is connected to a terminal T.sub.3, this circuit arrangement serves as an encoder. The combining network 10 and the inverter 11 on the main path l.sub.m perform a linear amplification. In response to a control signal S.sub.c generated by the rectifier and integrator 15, the variable filter 12 changes the quantity of transfer for a signal component having a frequency above 200 Hz. More specifically, when the level of an input signal at the common terminal T.sub.5 of the mode switch SW has lowered, the quantity of transfer from the variable filter 12 increases owing to a loop which consists of the variable filter 12, the signal amplifier 13, the control amplifier 14 and the rectifier and integrator 15. With the lowering of the input signal level, therefore, signal components at frequencies above 200 Hz on the side path l.sub.s increase.
In the case where the circuit blocks are arranged into an encoder, the signal on the side path l.sub.s is added to a signal on the main path l.sub.m. As shown in the amplitude-frequency characteristics in FIG. 2, accordingly, signal components at frequencies above 200 Hz come to have greater amplitude values gradually as signal levels lower.
On the other hand, in the case where the mode switch SW is connected to a terminal T.sub.4, the circuit blocks constitute a decoder. The inverter 11 on the main path l.sub.m is constructed as a signal inverter, and an output signal from the inverter 11 is applied to the common terminal T.sub.5 of the mode switch SW, so that the side path l.sub.s is supplied with a signal having a phase opposite to that of the input signal applied to the input terminal T.sub.1. Accordingly, the signal on the side path l.sub.s is subtracted from the signal on the main path l.sub.m. In the amplitude-frequency characteristics of the output signals from the decoder, therefore, the signal components at frequencies above 200 Hz come to have smaller amplitude values gradually as the signal levels lower.
The overshoot suppressor 16 limits the amplitude value of the terminal voltage which is to be applied to the variable filter 12. Unless the overshoot suppressor 16 is provided, an undesired change will develop in a transient signal of high level.
On the other hand, we have found that a great deviation in the detection characteristic of the rectifier and integrator 15 arranged on the side path l.sub.s occurs in the switchable signal compressor/expander of the known type. Especially, this disadvantage is particularly evident in the case where the output terminal of the signal amplifier 13 and the input terminal of the control amplifier 14 are D.C coupled. In a monolithic semiconductor integrated circuit, a decrease in the number of terminals is an important design objective from the viewpoint of the reduction of cost, and hence, the D.C. coupling between circuits is eagerly requested. It is required, however, that even with such D.C. coupling, various circuit characteristics do not depart from permissible ranges with respect to desired design values.